1. Field of the Invention
The present invention relates to a semiconductor device such a thin film transistor, a method of fabricating the semiconductor device, a method of producing a polycrystalline semiconductor film, and a method of an ion implantation used in such fabrication.
2. Description of the Related Art
Recently, an apparatus such as an image sensor or a liquid crystal display has been developed in which a drive circuit is provided on one and the same substrate. As a result, there has been an increase in demand for fabricating thin film transistors on a transparent insulating substrate. Since image sensors, liquid crystal displays, and the like have become large-sized and the productivity thereof has been improved, the substrate on which thin film transistors are formed has become large. Accordingly, a semiconductor fabrication apparatus is desired which is capable of handling a substrate having a large area.
An extremely important step among the process steps for fabricating a semiconductor device is a step for introducing impurities into a semiconductor layer. The impurities can be introduced by thermal diffusion or ion implantation. For example, by using thermal diffusion, the impurities are introduced from the surface of the semiconductor layer. By using ion implantation, impurity ions are implanted. The ion implantation method provides a more precise control of total dopant concentration and a depth to which the impurities are implanted into the semiconductor layer. Moreover, when the ion implantation technique is used, impurities can be shallowly implanted into the semiconductor layer, and impurities can be implanted into the semiconductor layer through thin films which are formed on the semiconductor layer. Furthermore, ion implantation can be performed at low temperatures at which a glass substrate will not deform. For the above reasons, ion implantation is most often used for introducing impurities into a semiconductor layer.
Using a conventional ion implentation apparatus, ions are implanted using an ion beam having a diameter of only several millimeters. When the ions are to be implanted over a large substrate using the above conventional ion implantation apparatus, it is necessary to either move the substrate mechanically or scan the ion beam electrically over the substrate because the area of the substrate is large as compared to the diameter of the ion beam. The provision of a mechanical moving means or an electrical scanning means causes a problem in that the ion implantation apparatus becomes complicated, large-sized and expensive.
One technique for solving the above problem and in which ions can be implanted into a large area is disclosed in Japanese Laid-Open Patent Publication No. 63-194326. According to this technique, ions generated by using a plasma discharge as the ion source are accelerated at a low voltage without mass separating them, and are implanted into a substrate which has been heated to a predetermined temperature in a shower-like shape. The ion implantation in a shower like shape means that ions are implanted over the semiconductor layer at a time.
Generally, when impurities are introduced into a semiconductor layer using an ion implantation apparatus, it is necessary to anneal the ion-implanted semiconductor layer, in order to maintain an appropriate conductivity of the semiconductor layer. According to a conventional ion implantation method, ions generated by the ion source are allowed to pass through a mass spectrometer to eliminate ions unnecessary to the ion implantation, and only the selected ions are accelerated and implanted. In this conventional case, most of the implanted ions are not positioned in a lattice, and the ions have low carrier movability. Therefore, in order to activate the ions, it is necessary to heat-treat the ions at a high temperature. Especially when impurities are introduced into polysilicon by ion implantation, the polysilicon turns into amorphous silicon due to damage by implantation, so that the specific resistance rapidly rises (to 10.sup.3 .OMEGA..multidot.cm or higher). When the amorphous silicon is turned into polycrystalline silicon by annealing the amorphous silicon, the implanted impurities are taken into the silicon crystals to produce carriers. Therefore, it has been necessary to perform annealing after ion implantation to activate the ions.
Also, in the case where the technique disclosed in Japanese Laid-Open Patent Publication No. 63-194326 is used for implanting impurities into a thin polycrystalline silicon (hereafter, referred to as polysilicon) film so as to form thin film transistors, it is still necessary to anneal the thin polysilicon film at a high temperature in order to activate the implanted impurities.
Since thin film transistors are formed on a transparent insulating substrate, the transparent insulating substrate must have heat resistance so as not to deform even at the annealing temperature. For this reason, quartz, which has a high heat resistance, is used as a material of the transparent insulating substrate. However, quartz is very expensive and a quartz substrate is diffucult to make in larger sizes. On the other hand, a glass substrate is inexpensive and is easy to make in larger sizes, but the glass substrate will deform at a deforming point temperature or higher, typically, at a temperature of 600.degree. C. or higher. The "deforming point temperature" referred to herein means the highest temperature at which the glass substrate will not deform. Therefore, when a glass substrate is used, it is preferable to fabricate the semiconductor devices at a temperature of 600.degree. C. or lower. At a temperature of 600.degree. C., however, it takes about 20 hours to perform the annealing for activation after the ion implantation, which causes a problem in that the fabrication process is very time consuming.
It is known that when a transistor is fabricated using a thin polysilicon film as a channel layer, dangling bonds of silicon atoms which exist at grain boundaries in the channel region of the thin polysilicon film adversely affect the transistor characteristics. By terminating the dangling bonds with hydrogen, a source-to-drain current during the off state is decreased, a threshold voltage is lowered, and the ON/OFF ratio (comparing the source-to-drain current during an on state to the source-to-drain current during an off state) is improved. This results in the improvement in the transistor characteristics.
For example, a hydrogenation technique is disclosed in Japanese Laid-Open Patent Publication No. 63-119269. According to the disclosed technique, hydrogen ions of a dose of from 1 .times.10.sup.17 to 1 .times.10.sup.20 ions/cm.sup.2 are accelerated at an accelaration voltage of 10 keV or lower, and are implanted into the channel region of the transistor. It is also disclosed that in order to effectively terminate the dangling bonds with hydrogen, it is necessary to perform annealing after the ion implantation. However, the hydrogen ions which have been implanted during hydrogenation leave from the polysilicon at about 400 C.
Therfore, when hydrogenation is to be performed after implanting impurities, the hydrogenation should be performed after the annealing at a relatively high temperature (about 600 C.) for activating the implanted impurities. Furthermore, in order to effectively terminate the dangling bonds with hydrogen, it is necessary to perform annealing at a relatively low temperature after implanting hydrogen ions. This means that it is necessary to perform both the ion implantion and the annealing twice.
Moreover, in the case where a CMOS transistor is to be fabricated, in order to form a p-region and an n-region, one of the two regions must be covered with a resist so that ions may not be implanted in that region when ions are implanted into the other region. As a result, the fabrication process becomes more complicated.
In an active matrix type liquid crystal display having thin film transistors in the pixel portion, the larger the display portion, the longer the corresponding gate bus line and source bus line. In order to prevent the resistance of the gate bus and source bus lines from increasing, a metal having a low resistance, e.g., containing aluminum or the like, is used as a material for fabricating the lines. It is preferable that a gate electrode is formed simultaneously with the gate bus line using the same metal, whereby the fabrication process of the thin film transistor is simplified. However, in order to attain good transistor characteristics, it is preferable to form source and drain regions in a self-aligned manner. For this purpose, it is necessary to perform ion implantation and activation annealing after forming the gate electrode.
If the gate electrode is formed of aluminum, however, the aluminum reacts with an insulating film or a semiconductor substrate in annealing after the ion implantation, because the melting point of aluminum is low. Therefore, the gate electrode cannot be formed of aluminum, and should be formed using a different material from that of the gate bus line, which results in a complicated fabrication process.
When thin film transistors are used for a liquid crystal display apparatus or an image sensor which has a large display area or a large sensing portion, the thin film transistors must drive large loads or drive loads at a high speed. Therefore, in such thin film transistors, semiconductor films for a channel region and source and drain regions of p-type or n-type conductivity preferably have a large field effect mobility. A semiconductor film of amorphous silicon can be formed at a temperature in the range of 200.degree. to 300.degree. C. by a plasma CVD (chemical vapor deposition) method, or at a temperature in the range of 400.degree. to 500.degree. C. by a low pressure CVD method. Such a low temperature process enables the use of cheap glass having a low deforming point temperature. In spite of such an advantage, the semiconductor film of amorphous silicon has a field effect mobility of only about 0.6 cm.sup.2 /V.s and is not suitable for driving a large load. On the other hand, a semiconductor film of polysilicon has a field effect mobility in the range of 30 to 150 cm.sup.2 /V.s and is suitable for driving a large load. However, the semiconductor film of polysilicon must be annealed at 500.degree. C. or higher. Therefore, glass having a low deforming point temperature cannot be used as a substrate on which the semiconductor film of polysilicon is formed.
There has also been research in how to form a semiconductor layer of polysilicon by crystallizing amorphous silicon with heat treatment such as furnace annealing, laser annealing, lamp annealing, etc. However, these annealing methods have following shortcomings. A furnace annealing method requires a annealing time in the range of 4 to 24 hours at a temperature in the range of 550.degree. to 600.degree. C. to crystallize amorphous silicon. As a result, production efficiency is not good, and such annealing for a long time causes deformation of the glass substrate on which the amorphous silicon is formed. It is difficult to obtain a large area of polysilicon having uniform characteristics by a laser annealing method because the laser annealing method cannot anneal a large area of amorphous silicon in one time. A lamp annealing method uses light having a long wavelength to heat objects. Such light having a long wavelength transmits through a semiconductor layer and reaches to the glass substrate. This results in simply heating of the glass substrate and deformation of the glass substrate.
The present invention overcomes aforementioned shortcomings associated with conventional technique and provides a method for producing a polycrystalline semiconductor film which has a large area at a low temperature with high productivity, and a thin film transistor having good device characteristics.